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Description
CV32E41P is a small and efficient, 32-bit, in-order RISC-V core with a 4-stage pipeline that implements the RV32IM[F,Zfinx]C[Zce] ISA
Repository
https://github.com/openhwgroup/cv32e41p.git
Project Slug
openhw-group-cv32e41p
Last Built
7 months ago passed
Home Page
https://github.com/openhwgroup/cv32e41p
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latest
'latest' Version
master